Kolloquium  /  November 15, 2021, 17.15 h

Colloquium on Semiconductor Technology and Metrology
Speeding up SiC Device Commercialization: SiC Substrate Technologies towards Reliable Power Devices

November 15, 2021, 17:15 h, online

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Despite extensive efforts in diameter scaling, cost of 4H-SiC substrates remains a barrier for fast adoption of superior SiC device performance in power electronics. A key cost driver is the high effort associated with the crystal growth process. Therefore, technologies aiming at both reduction of fabrication cost per wafer and improvements in material performance are attracting attention. Here, novel approaches towards suitable wafer material modifications will be discussed and presented. The presentations focus on technology and reliability, respectively.

 

Enabling the Best of SiC Material for Massive Adoption of Electric Vehicles
Ionut Radu, SOITEC, France

The transformation of the automotive industry to more eco-friendly vehicles is enabled by the implementation of advanced SiC technology. Its unique properties, including high electric field breakdown strength, and high thermal conductivity, make SiC a material of choice for power devices allowing for smaller size, lower losses, and higher operation frequency. Despite recent progress in 4H-SiC material quality, the availability of near defect-free wafers, is still insufficient.

Smart Cut™ technology provides a unique path towards the fabrication of very high quality SiC material with a significant reduction of the carbon footprint associated with substrate production. The Smart Cut SiC technology re-uses, more than 10 times, a donor that is free from basal plane dislocations, and the fabrication process leads to an epi-ready SiC thin film on top of a low-resistivity handle substrate. Moreover, through collaboration with major industrial, research and technology partners, we have fabricated test devices to measure the performance on the Smart Cut SiC substrates.

In this presentation, an overview of the Smart Cut SiC substrate will be presented, including recent results on the main material and substrate characteristics as well as early device validation.

 

Reliability of SiC Semiconductor Devices: Reliability Results, Sample Preparation and Power Cycling Setup
Jürgen Leib, Fraunhofer IISB, Germany

Power cycling is a comprehensive test method to extract many SiC aging effects. On one side, packaging related issues are addressed such as metallization adhesion. On the other hand, all kinds of temperature and current triggered device drift can be characterized. Thermo-mechanical cycling induces stress on all interfaces within the device. For the new substrate from Soitec, early Schottky devices have been fabricated. The performance was tested in relation to the bulk SiC state of the art. The used samples, test method and results will be presented in this talk.