Join the oral presentation at ICSCRM to gain valuable insights for the design and reliability testing of next-generation power electronic systems:

"Bipolar Degradation in 1.2 kV SiC MOSFETs under Microsecond Pulsed Stress: Influence of Accumulated Injected Charge and Thermal Boundary Condition" by Hasibul Hasan and team Rijuta Bagchi, Lukas Farnbacher, Juergen Leib on Oct 1st, 10:20 AM - 10:40 AM JST (UTC +9), Oral-A (1st Floor, G7+G8).

In real-world converter applications, the growth of crystal defects known as Shockley-type stacking faults (SSFs) can be triggered when the body diode of a SiC MOSFET conducts current. Since this conduction occurs in transients and short-interval pulses during practical operation, testing devices under microsecond pulsed stress is essential. In his work, Hasibul Hasan utilizes his newly developed power cycling microsecond setup. The study investigates how pulse shape, current density, pulse width and thermal boundary conditions influence degradation mechanisms. Furthermore, the focus is on whether accumulated injected charge can serve as a reliable degradation metric for packaged SiC MOSFETs.