Packaging & Reliability

Packaging

The research field is packaging of power electronics. The drivers are performance, volume and weight per cost depending on the application. The goal is reached by investigations of different concepts of the electrical, mechanical and thermal design such as single and double sided die attach, single and double sided cooling, materials with minimized or matched coefficient of thermal expansion (CTE). By use of intelligent setups and application relevant measures of the electrical and thermal interconnections the bill of material is minimized.


Work is done on joining technologies as well. There is a long experience in silver sintering as an alternative to the state of the art. Meanwhile a process is established to manufacture multichip power modules with high yield. Especially a selective sintering process brings big pace to electronic packaging, especially on printed circuit board. The chips sizes meet the power electronics requirements. While the sintering improvements are ongoing the soldering technology is still covered for new high performance or high temperature materials.

 

Packaging
for Electronics

Our activities range from conceptional investigations like thermal management and electric parasitics optimization to technology and process development such as metal sintering, soldering, wire bonding, subtractive and additive manufacturing and coating. We offer design studies up to prototyping and testing.

 

Materials
and Processing

We are developing packaging materials and dedicated processing focusing on breakthrough research and advanced customer requirements. Harsh conditions or weight, cost and environmental restrictions are typical tasks addressed.
Our work is accompanied and guided by specific testing and electrical characterization of the materials performance in real-life scenarios.

 

Multiphysics Simulation for Power Electronics

Modelling and simulation for power electronics allows for reliable predictions for electrical, thermal and mechanical behaviour, on device, module and system level. More specifically, we offer lifetime simulations from a physics of failure approach, parasitic extraction in electronic packages, circuit simulation, electric and electromagnetic simulation and a combination of all that.   

Test & Reliability

Lifetime aspects of power electronics are under investigation in this research field. Different tests are performed, like power cycling, temperature cycling or humidity storage and many others. A huge variety of characterization and analyses tools are available such as for measurement of the thermal impedance of power devices, lock-in thermography, scanning acoustic microscopy, static and lock-in thermography, scanning electron microscopy, focused ion beam sectioning and others. The results are used to improve the technologies further. In addition they are utilized to parameterize existing or to create new lifetime models. The physics of failure method is addressed whenever possible. All activities are not limited to active devices only. Passive components are covered like inductors and capacitors as well as different potting materials.

 

Power Cycling and Thermal Characterization

Comparative lifetime characterization by power cycling of power modules and technology samples, including qualification tests and technology investigations are in the focus. As well as research and services on thermal characterization of new packaging concepts, materials, devices, and technologies for power electronic devices, from junction to coolant, by indirect and thermographic measurements.

 

Failure Analysis

The analysis of different system components before and after targeted aging as well as from field returns can be performed using imaging procedures and other characterization methods.

To expose system components, devices or modules can be decapsulated. Various etching processes and laser ablation are available for this purpose.

 

Lifetime Prediction

A robust und reliable product design needs efficient lifetime prediction. From the mission profile to power losses to the thermal profile to the load analysis to the lifetime prediction by empirical and material based lifetime models is what we do.

YESvGaN – GaN Vertical Power Transistors at Silicon Cost

YESvGaN targets a new low-cost wide-bandgap (WBG) power transistor technology for enabling high-efficiency power electronic systems for electromobility, industrial drives, renewable energies, and data centers.

The main objective of the project is to demonstrate innovative vertical gallium nitride (GaN) power transistors fabricated on a low-cost substrate such as silicon. This so-called vertical membrane architecture combines the superior performance of GaN as WBG power transistor material with the advantages of a vertical architecture regarding current and voltage robustness at a price competitive to silicon IGBTs. Within YESvGaN, the entire value chain is addressed – from substrate, epitaxy, process, and interconnect technology to applications in power electronic systems. The YESvGaN consortium combines the experience and competence of 23 industrial and research partners from 7 European countries.

Fraunhofer IISB contributes to the project along the entire value chain, including:

  • Analysis of epitaxial layer stacks and crystal defects, development of innovative routines for measuring the electrical properties of defects and thin membranes
  • Definition of new processes for handling of thin membranes during packaging and ceramic embedding
  • Electrical characterization of novel power devices, development of an electrical simulation model, and design of a half-bridge power module

YESvGaN Homepage

Projects & Publications

Brochures as PDF

 

Brochures as PDF

 

Explore the Entire Power Electronic Systems Value Chain